Serial RapidIO (SRIO) is a key technology that is widely used as chip-to-chip interface in wireless communication applications. Mobiveil is actively involved in the definition and deployment of this technology worldwide. With its insight into this technology, Mobiveil developed a state-of-the-art, highly configurable, Serial RapidIO interface IP (GRIO™) with AXI Interface (RAB™) that operates at 6.25Gbps. Last year, LSI selected this IP as the SRIO interface for its Axxia 5500 family of communication processors.
Developing an interface IP as complex as an SRIO interface takes several man years of design and verification effort. Moreover, making such IP compliant and interoperable with other SRIO interfaces is extremely time consuming. Considering the huge cost involved in manufacturing new processors, semiconductor companies are extremely selective when choosing subsystems or components for their SOC (System On a Chip) designs. Being selected as a key interface provider for the LSI Axxia processor is a big achievement for Mobiveil.
Axxia 5500 is LSI’s first ARM technology-based communication processor family designed for mobile networking applications like base stations, backhaul and mobile services gateways. By combining LSI® networking accelerators and Virtual Pipeline™ technology with ARM’s power-efficient cores and scalable interconnect, the new Axxia processors are specifically designed to address the performance challenges facing next-generation networks.
Mobiveil to Sponsor the DAC Pavilion during the 2018 Design Automation Conference In San Francisco; Learn about Mobiveil’s IP based solutions for Flash Storage, Communications, and IoT at Booth 2157
Mobiveil and Avery Design Systems partner to provide SoC designers a fully verified and compliant PCIe 5.0 IP solution