The wide availability and declining cost of NAND flash semiconductor memory is driving a major transformation in the mass storage architecture of client devices and servers. Once the mass storage of choice in PC clients and servers, rotating memory hard drives are increasingly being replaced by solid state drives built with NAND flash memory chips. The demand for NAND as mass storage in smart phones and tablets drove a resurgence in the manufacture of NAND flash chips. The resulting lower cost per bit finally made it a viable hard drive replacement in PCs, especially the ultrabook that market research firm NPD touted as the next incarnation of the laptop.
Writing in ZDNet.com May this year, Adrian Kingsley-Hughes observed that, “By 2017, the total worldwide shipments of solid state drives in PCs is predicted to rise by a factor of seven, increasing from 31 million units in 2012 to 227 million units. Correspondingly, hard disk drives shipments will decline sharply over the same period to 410 million.”
What makes SSD attractive in client computing, its higher performance over rotating memory, also makes it attractive for servers, where transactions per second are a critical metric. While the performance of the CPU chips scaled dramatically, the performance of the storage elements lagged behind causing the CPUs to starve for data. Also the trends in big data and virtualization demanded even more storage performance. SSDs eliminate the mechanical latency inherent in hard drives, thus making them ideal as large cache storage between the massive hard drive farm and the server CPUs. In the past, boosting transactions per second meant adding more servers. Instead by installing lower cost SSD cache, to store frequently accessed data, the servers’ transactions per second rise sufficiently to delay the need to add servers.
A solid state solution promotion on the Dell website described the value proposition this way: “IOPS-hungry applications like Oracle, SQL, and SAP can move business faster, better inform decisions, and improve customer service, but providing the performance they need can be costly. Flash-optimized solution can reduce latency up to 90%, in 84% less rack space, for 80% less cost/GB than conventional spinning disk solutions.” Almost 90% savings in power is another added advantage of switching to solid state devices.
The SATA interface was designed for a mechanical memory with rotational latency combined with mechanical head positioning latency. Thus, the hard drive interface only had to keep up with the maximum speed of a rotating disk. The interface speed of SATA was sufficient for early SSD implementations but as technology evolved, the data transfer rates of SSDs steadily grew and future generations will outstrip the limitations in the SATA specification.
The option for SoC designers building SSD controller chips is whether to employ a SATA to PCIe or NVMe to PCIe interface. That debate has been settled as argued by Dave Landsman of SanDisk in his presentation “AHCI and NVMe as Interfaces for SATA Express™ Devices – Overview.” SATA is not going forward. It’s stuck at 6GB/s (SATA 3.0), whereas NVMe is going to 16 GB/s and beyond.
Why is SATA not able to migrate upward? The ecosystem needed to drive the migration is not there. There are very companies involved in SATA. Thus, it lacks the critical mass needed to write new standards, get them published, make wide availability of the tools needed to support the standard, etc. Contrast this to NVMe, which has more than 100 members, an active ecosystem that is migrating the standard forward beyond 16 GB/s. There is a clear roadmap and a group dedicated to getting the standard where it needs to go.
To shorten time to market for SoC designers with existing SATA or proprietary interface wanting to convert to NVMe, Mobiveil has created a complete reference design and NVMe IP (http://www.mobiveil.com/). It’s available now.
PR links in Digital Media
Mobiveil to Sponsor the DAC Pavilion during the 2018 Design Automation Conference In San Francisco; Learn about Mobiveil’s IP based solutions for Flash Storage, Communications, and IoT at Booth 2157
Mobiveil and Avery Design Systems partner to provide SoC designers a fully verified and compliant PCIe 5.0 IP solution