Vice President of Engineering
Amit Saxena Vice President of Engineering, Digital IP Business Unit, leads the strategy and development of High speed interconnects Intellectual blocks at Mobiveil. Amit brings more than 21 years of Engineering and Management experience in the Semiconductor, IP and Systems Industry. Prior to this position, he had served as the Director of Engineering at L&T Infotech and GDA Technologies where he led development and deployment of high speed Interconnect IP blocks including PCI Express, RapidIO, USB3 and MIPI. Amit successfully built and guided the IP Engineering and Applications organizations under the Product Engineering Services Business Unit in L&T Infotech, Ltd.
Previously, until its acquisition by L&T Infotech in 2006, Amit had several different leadership positions in Engineering at GDA Technologies Inc. in the IP, ASIC and system engineering groups, executing highly complex programs and projects for Tier-1 customers. Prior to that Amit was one of key Application Engineers at OPTi, the fastest growing PC chipset provider at that time.
Amit holds a MS degree in Communication Systems from IIT Kanpur.
Mobiveil to Sponsor the DAC Pavilion during the 2018 Design Automation Conference In San Francisco; Learn about Mobiveil’s IP based solutions for Flash Storage, Communications, and IoT at Booth 2157
Mobiveil and Avery Design Systems partner to provide SoC designers a fully verified and compliant PCIe 5.0 IP solution