If you are interested in a dynamic, innovative and rewarding work environment, then Mobiveil is your right choice. We offer an exciting platform to build on your creative and Technical expertise. We are building highly valued solutions for the Mobility and Networking verticals and our employees get to work on state of the art Technologies, and align with Tier 1 customers.

We currently have openings in Milpitas, California and Chennai/Bangalore in India

Cultural Diversity

At Mobiveil, we believe that our employees are the key strength of the company. As a truly global organization, we thrive on diversity. Mobiveil is a place where technology and people strike a perfect balance, with employees given space to pursue their careers and their own personal interests.
We offer a perfect platform for employees to learn, grow, and have fun. Employees are offered challenging projects, a clear career path, and the opportunity to bring ideas to the table and implement their distinctive concepts. We ensure that the workplace environment allows for real innovation and opportunity.

Compensation and Benefits

Mobiveil offers a compensation package that is commensurate with your experience and skills and on par with the industry. For us our employee is our first and most important Customer! We believe in offering our employees perfect work-life balance.

The compensation package at Mobiveil consists of stock options, salary, bonus, and benefits. The components of the package include:

  • Ownership through stock options
  • Performance based bonus
  • Medical Insurance
  • Paid Vacation
  • Paid Holidays(Company Designated)

US Openings

  • IP Level Verification
    Requirements:
    • Strong background in IP-level verification
    • AXI-3/4 Protocol experience.
    • Performance benchmarking experience.
    • Verification Expertise in System Verilog
    • Expert in Verification methodologies (UVM, OVM, VMM)
    • Experience developing Verification components from scratch
    • Experience in Test plan and Test Case creations>
    • Sound debugging skills

    Job Location: Bay Area, CA
    Exp –3+ Years
    Educational Qualification – BSEE/MSEE
    Authorized to work in US
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • User Mode driver (UMD) development
    Requirements:
    • Hand-on experience in software distribution and installation
    • Hand-on experience in C/C++
    • Develop / port driver
    • Integrate UMD with AAL (Intel Accelerator Abstract Layer) interface

    Job Location: Bay Area, CA
    Exp –3+ Years
    Educational Qualification – BSEE/MSEE
    Authorized to work in US
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Design development and FPGA integration
    Requirements:
    • Hand-on experience in all C, SystemVerilog, SystemC, HLS
    • Hand-on experience in FPGA design
    • Experience with C-to-Silicon is a plus
    • Design accelerator logic in SV, SC, HLS
    • Map FPGA resources to design and close timing
    • Document design for SW/CSR interface, Design Spec, user guide

    Job Location: Bay Area, CA
    Exp –3+ Years
    Educational Qualification – BSEE/MSEE
    Authorized to work in US
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • CAD Engineer
    Requirements:
    • Develop and deploy RTL tools and methodologies for IP development
    • Develop and deploy software to enable IPs for Quartus

    Job Location: Bay Area, CA
    Exp –3+ Years
    Educational Qualification – BSEE/MSEE
    Authorized to work in US
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Reference Design
    Requirements:
    • Reference design building through Quartus, basic validation and testing on hardware.
    • Designs to support protocols like Pcie, Ethernet, Interlaken, CPRI etc.

    Job Location: Bay Area, CA
    Exp –3+ Years
    Educational Qualification – BSEE/MSEE
    Authorized to work in US
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Testcase development
    Requirements:
    • Develop initial testcases for both driver and HW test
    • Work with verification team to come up with testplan to create test for PV coverage

    Job Location: Bay Area, CA
    Exp –3+ Years
    Educational Qualification – BSEE/MSEE
    Authorized to work in US
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Hardware bring-up / Debug
    Requirements:
    • Develop Hardware testplan
    • Collect hardware coverage

    Job Location: Bay Area, CA
    Exp –3+ Years
    Educational Qualification – BSEE/MSEE
    Authorized to work in US
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • ASIC/SOC/IP Verification Engineers
    Requirements:
    • Hands on ASIC/SOC/IP Functional Verification Experience
    • Verification Expertise in System Verilog
    • Expert in Verification methodologies (UVM, OVM, VMM)
    • Anyone domain Experience is a must–
      • PCIe Gen 3/4
      • 10G/40G/100GEthernet MAC
      • Compression (LZ77 compression algorithm) Verification.
      • Data compression
    • Experince developing Verification components from scratch
    • Experince in Test plan and Test Case creations
    • Sound debugging skills
    • Code and functional coverage verification closure

    Job Location: Bay Area, CA
    Exp –4 + Years
    Educational Qualification – BSEE/MSEE
    Authorized to work in US
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Ethernet MAC Layer _Verification Engineer
    Requirements:
    • Experience in ASIC/IP functional Verification
    • Strong expertise in Ethernet Mac Layer Verification
    • Experience developing UVM, System Verilog components from Scratch
    • Good experience in developing test plan covering 100% of protocol features
    • Sound debugging skills
    • U.S. Citizens and those authorized to work in the U.S. are encouraged to apply

    Job Location: Bay Area, CA
    Experience: 4 to 12 years
    Educational Qualification – BSEE/MSEE
    Authorized to work in US
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Software Engineer
    Requirements:
    • Minimum 5+ years of work Software Testing/Development experience
    • Demonstrated Proficiency in Python and expertise with developing SQL queries
    • Query plan and optimization will be plus
    • Prior Test or Validation experience required to Self-driven and ability to work independently on the task.

    Job Location: Bay Area, CA
    Exp – 5+ Years
    Educational Qualification – BSEE/MSEE
    Authorized to work in US
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Hardware board design/Signal Integrity Design
    Requirements:
    • High Speed circuit design experience with exposure to 10G,40G & 100G designs.
    • Familiarity with optical networking standards and protocols (OTN, Ethernet, DWDM, optics).
    • Proficiency and experience with signal integrity and power integrity analysis.
    • Good experience with lab tools and equipment to test and verify high speed digital designs.
    • Strong team player who can work under tight schedules to meet customer requirements.

    Job Location: Westford, MA US
    Exp – 10+ Years
    Educational Qualification – BSEE/MSEE
    Authorized to work in US
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • PCIe Gen3/4 Verification Engineers
    Requirements:
    • 5-10 years of experience in ASIC/IP functional Verification Engineer
    • Strong expertise in all layers of any of the following protocol PCI-Express Gen 3 / 4
    • Strong UVM skills in terms of UVM testbench infrastructure development, test creation (including writing assertions) and test debug etc.
    • Good domain skills in the areas of PCIE, DDR, HBM, NOC, DSP etc.
    • Strong verification failure debugging skills using Verdi or other debuggers.
    • Experience developing UVM, System Verilog components from Scratch
    • Good experience in developing test plan covering 100% of protocol features
    • Sound debugging skills
    • Authorized to work in US

    Job Location: US – Bay Area
    Exp – 5 to 10 Years
    Educational Qualification – MS
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • PCIe /NVMe Verification Engineer
    Requirements:
    • Must have PCIe and NVMe protocol knowledge
    • Expertise in developing block level / system level verification environments using System Verilog and UVM
    • Expertise to develop BFMs / Checkers / monitors / Scoreboards
    • Experience in developing block/system level verification plans and tests.
    • Must have capability to debug test failures to find the root cause.
    • Experience in code / functional coverage
    • Experience in constrained random testing
    • Authorized to work in US

    Job Location: US – Bay Area
    Exp – 5 to 10 Years
    Educational Qualification – BSEE/MSEE
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Memory Verification
    Requirements:
    • 4+ Exp of Formal/Functional Verification with Memory
    • AXI interconnect and NoC experience is highly desired compared to DDR4, LPDDR4 verification experience
    • Strong in UVM Testbench architecture and at least 5 years of System Verilog/UVM experience.
    • Functional Verification with coverage, component development etc.

    Job Location: Bay Area, CA
    Exp – 4+ Years
    Educational Qualification – BSEE/MSEE
    Authorized to work in US
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Firmware Validation Engineer
    Requirements:
    • We need an experienced Firmware validation engineer to understand SATA/NVMe SSD’s system design and firmware algorithms in order to create a firmware design verification plans and implement them in modern object oriented languages.
    • SATA SSD products must be validated in house to assure that products shipped will meet OEM quality requirements.
    • Work closely with the system architects and the firmware team to develop design verification plans, test bench and test cases.
    • Develop an overall firmware validation strategy including defining validation infrastructure and validation methodology.
    • Debug the firmware and expose design issues.
    • Define and design functional tests required to meet customer needs.
    • Review SATA/NVMe SSD validation requirements and influence future product design for debug and test.
    • Work with customers to understand field bugs and to enhance the validation coverage.
    • Interface with all key stakeholders to ensure product validation meets customer expectations and needs.
    • In depth understanding of firmware algorithms used in any NAND Flash based storage devices (SSD, eMMC, SD, USB Flash drives) or other storage devices.
    • Knowledge in any Host protocols like as SCSI, SATA, eMMC, UFS, PCIe, NVMe is an added advantage.
    • Experienced and familiar with firmware development, Integration and validation.
    • Knowledgeable on product and quality standards and relevant host protocols, in particular SATA and NVMe.
    • Test coverage methods for real-time embedded systems, especially storage systems and/or NAND storage.
    • Able to methodically root cause complex failure mechanism.
    • Strong programming knowledge & debugging skills in Python, C and C++.
    • Soft skills, Excellent written and verbal skills, be a Team player.
    • Able to develop key relationships.
    • Able to elect requirements from all stakeholders.
    • Be able to work in pressure for quick resolution and delivery.

    Job Location: Bay Area – San Jose
    Experience: 4+ years
    Educational Qualification – BE/BTech or ME/MTech
    U.S. Citizens and those authorized to work in the U.S. are encouraged to apply
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • DFT Verification Engineers
    Requirements:
    • Strong Familiarity with Verification Methodologies such as OVM, UVM, or VMM
    • Strong working experience in areas like DFT/MBIST/Scan Clear/LBIST/Boundary Scan
    • Familiarity with Verilog and General Logic Design concepts
    • Knowledge of system-level architecture including buses like AXI/AHB, bridges, AXI interconnects

    Job Location: Bay Area, CA
    Experience: 4 to 12 years
    Educational Qualification – BSEE/MSEE
    Authorized to work in US
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • RTL Design (STA, Synthesis & Constraint Development)
    Requirements:
    • Front end implementation engineer for the development of high-performance IP blocks in the company’s next generation FPGA product.
    • Successful candidates will be responsible for prototype implementation of assigned IP blocks to ensure RTL meets all defined quality metrics.
    • Good Exposure on Design Flow Automation.
    • Responsibilities include running RTL LINT, DFT DRC, logic synthesis, logic equivalence checking, low power checks, Memory BIST insertion, scan insertion, SDC verification, and CDC verification. Additional responsibilities include the development of signoff quality SDC constraints and the development of power intent constraints.
    • Maximizing efficiency through the effective use of automation throughout these processes is expected.

    Must have:
    • TCL script development within these tool shells in addition to running/analyzing/debugging designs.
    • Synopsys DC/DCT/DCG/DE-Explorer.
    • Synopsys PrimeTime including SDC constraint development for complex blocks with many clock domains.
    • Mentor Questa CDC (Zero In).
    • Cadence Conformal LEC , Cadence Conformal Low Power including UPF development.
    • Fishtail Confirm , Spyglass LINT and DFT including the development of custom rules.

    Nice to have :
    • Perl and TCL scripting expertise are essential. Background in MEAN web application development or HTML generation is a plus.
    • Experience with either RTL development or physical design is also a plus.
    • U.S. Citizens and those authorized to work in the U.S. are encouraged to apply.

    Job Location: Bay Area, CA
    Exp – 4 to 12 Years
    Educational Qualification – BSEE/MSEE
    Authorized to work in US
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Verification Engineer (Emulation)
    Requirements:
    • Drive the porting of a digital DSP block onto an existing proprietary system level emulation platform and complete the verification of the block through extensive simulation and testing.
    • The candidate will work with the Design team to understand the block and with help from the Verification team, will create the tests required to ensure a robust design. This will include creation of test plans, benches and vectors, failure debug and feedback to the Design team.
    • The Candidate will additionally work with Architecture and Software teams to understand the high-level use cases intended for the block, so that they can be incorporated into the testbench.

    Job Location: US
    Exp – 4 to 10 Years
    Educational Qualification – BSEE/MSEE
    Authorized to work in US
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Automotive Product Engineer
    Requirements:
    • 8+ Years of Experience in Architect, design, and implement efficient manufacturing processes for automotive board & system products.
    • Represent Ops Engineering during architecture and design product life cycle and provide manufacturing capability feedback (DFM, DFT, DFR, DFA needs) to design teams.
    • Define product test requirements, drive NPI bring up, validation & characterization for smooth production ramp at worldwide manufacturing sites.
    • Continuously identify opportunities for potential NPI process improvements and collaborate with cross functional teams to implement.
    • Demonstrated track record of leading new board/system-level products through different phases of life cycle(from design to high-volume manufacturing)
    • DFx knowledge in electrical, thermal and mechanical components of system
    • Knowledge of hardware and software interaction (e.g. familiar with embedded low level firmware and/or embedded operating systems and H/W)
    • Good understanding of System on Chip (SoC) IO interfaces (e.g. USB, SPI, UART, I2C, I2S, CSI, Ethernet, display ports, etc) and memory subsystem design
    • Hands-on experience in PCB design analysis, prototype bring-up and debugging, failure verification and manufacturing test support
    • Hands-on experience with Perl/Python/Shell scripting
    • Experience working in a cross-functional engineering environment
    • Experience in Manufacturing Test and validation planning and reporting
    • Expert in Design of experiments creation, execution and data analysis
    • Possess excellent team work and communication skills
    • Experience in constrained random testing
    • Familiarity with automotive electronic requirements will be a plus
    • U.S. Citizens and those authorized to work in the U.S. are encouraged to apply.

    Job Location: Bay Area, CA
    Exp – 8+ Years
    Educational Qualification – BSEE/MSEE
    Authorized to work in US
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.

India Openings

  • Processor / Video Transcoding (MPEG /H.264) Verification
    Requirements:
    • Looking for Verification engineer with experience on Video Transcoding (MPEG/ H.264 Codec Standards) /Processor
    • Knowledge of video encoding/decoding
    • Preferred experience on MPEG2 (ISO/IEC 13818) and H.264 (ISO/IEC14496-10) Standards, with Elementary/Transport Stream
    • Expertise in Verification (UVM, Systemverilog)
    • Scripting and Debugging Skills
    • Experience in developing complex test bench/model in UVM/System Verilog
    • Experience in writing test plans and test cases
    • Prefer experience with any Processor architecture and Programming Knowledge in C/C++ or Assembly ( Any assembly )

    Experience: 4 to 10 years
    Educational Qualification: BSEE/MSEE
    Job Location: Bangalore & Chennai
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Verification Engineers
    Requirement:
    • Some Computer Architecture/ CPU/processor knowledge/background – MUST
    • Strong Programming & Debugging skills in Assembly ( Any assembly ) or C/C++
    • Good Sys Verilog experience ( UVM experience would be a plus )
    • Scripting and Debugging Skills
    • At least 2+ years of work experience

    Experience: 2-6 years
    Job Location: Bangalore
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Hardware Engineer
    Skills
    • 2 to 4 years of Hardware design experience
    • Ability to learn quickly and Pay attention to details
    • Candidate must be Strong in circuit Design and shall have experience in Processor based designs
    • Ability to take design decisions based on thorough analysis, mathematical approach, due diligence
    • Experience in High speed board design, PCIe, Ethernet, USB, DDR3/DDR4 interfaces
    • Basic understanding on Signal Integrity and Power integrity
    • Experience in Power supply Design and testing
    • Must be proficient in any of the EDA design capture tools (ORCAD, Concept HDL, DxDesigner)
    • PCB Soldering skills
    • Strong commitment to achieve high quality in every single task
    • Should exhibit high levels of productivity

    Job responsibilities
    • Design, Develop and test Embedded hardware Products
    • Provide high quality Design services to our esteemed clients
    • Take complete ownership of Hardware design and give results on time
    • Shall work closely with cross-functional teams like PCB Design, Firmware/Software development and also with third-party vendors
    • Learn new technologies in shorter time span
    • Flawless approach to deliver quality designs in lesser iterations
    • Analyze the design requirements thoroughly and come up with an optimized Hardware solution
    • Understand the organizational goals and Contribute to the overall development of the organisation

    Job ID : MVHW1500
    Job Category: Junior to Mid-senior
    Job Location : Chennai
    Eligibility : Engineering degree in Electronics
    Experience : 2 to 4 years of Hardware Design experience
    Compensation : DOE
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Low Power Design and Low power Implementation Engineers
    Skills
    • Good understanding of concepts of power consumption, power estimation and low power design
    • Good understanding of power considerations at architectural, block and circuit levels
    • Experience in low power ASIC design implementation, power simulation and analysis flow, and ASIC physical design methodology
    • Experience in power modeling methodologies and low power optimization
    • Familiarity with Power Integrity and recognizing DC and AC losses
    • Familiarity with UPF and/or CPF power intent formats
    • Familiarity with multi-voltage static checkers (MVRC, CLP, VSILP/VCLP)
    • Familiarity with power estimation tools, such as PrimeTime-PX, PowerArtist or PowerPro is a plus
    • Silicon power measurement is a plus
    • Strong communication skills are a pre-requisite as the candidate will interface with a lot of different groups

    Experience: 5+ years
    Educational Qualification – BS/MS EE, EC, or CS
    Job Location: Bangalore
    Notice Period: 3-4weeks
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • RISC-V Software Developer
    Requirement:
    • Strong knowledge in MIPS or PowerPC or Sparc or equivalent Processor architectures
    • Very sound in processor memory models
    • Strong ‘C’ and assembly level coding expertise
    • Strong Linux kernel and driver development skills
    • Experience working with Peripherals like PCIe, DDR4, USB 3 etc.
    • Good knowledge with GCC, GDB, JTAG debugger tools
    • Knowledge on DMA, file management, Power Management

    Job Description:
    • Understanding of Berkeley RISC-V architecture
    • Setting up the Tool chain for RISC-V architecture
    • Modification of Make File based on target hardware
    • Supporting the open source to be customized for the target board with BSP support
    • Porting of Boot Loader
    • Porting of Linux OS
    • Creating drivers from scratch for standard and custom blocks
    • File System implementation
    • Porting of Linux application

    Experience: 4 to 10 years
    Educational Qualification: BE/BTech or ME/MTech
    Job Location: Bangalore
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Flow Support and Automation Engineers
    Qualifications:
    • Master of Science degree in Electrical Engineering with five years of industry experience. Additional qualifications include
    • Strong communication skills (verbal and written)
    • Teamwork skills and the capability of managing a dynamic work environment
    • Ability to be flexible between multiple roles throughout the progress of the project
    • Good understanding of physical design tools. DC/ICC/ICC2/PT/ICV
    • Good understanding of physical design flows flow, flow automation and design data management
    • Good software skills (Perl, TCL, shell scripts) – good overall scripting knowledge and hands-on experience
    • Excellent interface skills to interaction with internal and external tool vendors
    • Good customer support skills across remote sites

    Roles and Responsibilities

    Responsibilities will include but not be limited to:

    • Responsible for Digital design automation, flow-automation and regression across RTL2GDSII
    • Build, maintain and enhance regression system that encompasses complete RTL2GDSII system across wide variant of design styles and flow-automation
    • Planning and coordinating of regression standards across all aspects of RTL2GDSII
    • Engage with design for flow integration and regression

    Experience: 2-5 years
    Job Location: Bangalore
    Notice Period: 3-4weeks
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Wi-Fi / WLan Network Developer
    Qualifications:
    • Good C and C++ programming Skills
    • Strong expertise in Embedded Software Development
    • Good understanding on L2/L3 protocol
    • Wi-Fi Domain Knowledge – a Must
    • Working knowledge in CAPWAP protocol, Wi-Fi/ 802.11 and Bluetooth will be beneficial
    • Debugging Skills on System/Silicon level will be an added advantage
    • Good knowledge with GCC, GDB, JTAG debugger tools
    • Strong Linux Kernel and Driver development skills
    • Good verbal and written communication skills (This should be added for all our JD’s)

    Experience: 4 to 10 years
    Educational Qualification: BE/BTech or ME/MTech
    Job Location: Bangalore & Chennai
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Senior DFT Engineers
    Requirements:
    • Experience in DFT especially on Chip level Scan DRC and ATPG
    • Should have worked at full chip level
    • Knowledge on Synopsys tools is preferred
    • Experience in delivering patterns to ATE and support is preferred

    Experience: 5+ years
    Educational Qualification – BS/MS EE, EC, or CS
    Job Location: Bangalore
    Notice Period: 3-4weeks
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Post Layout STA Design
    Requirement:
    • ASIC timing Constraint development, Synthesis/ STA.
    • Strong experience in Logic synthesis, STA, Lint and CDC checks
    • Post-Layout STA is Mandatory
    • Experience in doing SoC level timing analysis
    • Should be familiar with timing analysis for hierarchical designs
    • Should be proficient with Synopsys' Prime Time for timing analysis
    • Good scripting skill in Tcl and Perl
    • knowledge of Synopsys tools
    • Good team player working with geo-dispersed cross cultural and cross functional teams
    • Good communication and interpersonal skills required.

    Experience: 3 to 10 years
    Educational Qualification: BE/BTech or ME/MTech
    Job Location: Bangalore
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • SOC level AMS verification
    Requirements:
    • Analog and Mix signal block connectivity verification at RTL and gate level.
    • Integrate analog models with RTL and GATE simulation environment.
    • Define test strategy for Analog blocks - create test plan, define test concurrencies.
    • Responsible for test pattern generation based on timing simulation, release for ATE and Post silicon debug.
    • Support silicon characterization and bench level testing by working with design, verification, bench and test teams.
    • Responsible for system level verification for complex SOC which has digital, analog and RF components.

    Skills/Experience
    • Experience in RTL/GATE level verification concepts of digital and analog blocks
    • Experience on AMS top level verification and basic Understanding of Analog blocks; post-silicon debug of analog blocks is desirable
    • Expertise in verifying complex designs from system as well as block level, through design flow.
    • Experience in VERA, MODELSIM, Debussy, C
    • Knowledge on Perl or any other scripting language
    • Exposure to post silicon debug – ATE testing/Bench/application testing
    • Ability to work in an international team, dynamic environment with good communication skills
    • Ability to learn and adapt to new tools, methodologies.
    • Ability to do multi-tasking & work on several high priority designs in parallel.

    Experience: 4 to 6 years
    Educational Qualification – BE/BTech or ME/MTech
    Job Location: Chennai
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • DFT/ATPG/BIST Engineer
    Requirements:
    • Interface with design team to ensure DFT design rules and guidelines are met.
    • Generating high quality manufacturing ATPG test patterns for stuck-at (SAF), transition fault (TDF), Path Delay fault (PDF) models through the use of on-chip test compression techniques.
    • MBIST verification (including repair), test pattern generation through Mentor tool.
    • IDDQ constraint validation and pattern generation along with IVA analysis.
    • ATPG (SAF, TDF) and MBIST verification using unit delay and min/max timing corner simulations.
    • Work with the Product/Test engineering teams on the delivery of manufacturing test patterns for ATE
    • Responsible for supporting post Si debug effort, issue resolution
    • Responsible for Diagnostic Tool generation for ATPG and MBIST and bring-up on ATE.
    • Developing, enhancing and maintaining scripts as necessary
    • Experience in ASIC/DFT - simulation, Silicon validation
    • Detailed knowledge on DFT concepts, pattern simulation, Silicon debug and yield enhancement
    • In depth knowledge and hands on experience in ATPG - coverage analysis, Transition delay test coverage analysis.
    • In depth knowledge of Memory verification, repair and failure root-cause analysis.
    • Experience with any of these tools is required
      • ATPG - Tetramax, TestKompress
      • MBIST - Mentor ETVerify
      • Simulation - VCS (preferred), modelsim
    • Expertise in test mode timing constraints definition, Hands on experience with prime time is an added advantage
    • Expertise in scripting languages such as Perl, shell, etc. is an added advantage
    • Ability to work in an international team, dynamic environment with good communication skills
    • Ability to learn and adapt to new tools, methodologies.
    • Ability to do multi-tasking & work on several high priority designs in parallel.

    Experience: 4 to 6 years
    Educational Qualification – BE/BTech or ME/MTech
    Job Location: Chennai
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • CPU Processor Design
    Job Summary:
    • Bachelors or Masters degree in Computer Science or Electrical/Computer Engineering
    • Understanding of general purpose CPU micro architecture, including knowledge of areas such as processor pipelines, caches, memory hierarchy, and multi-processor systems
    • Knowledge and or Experience in RTL Design hardware development using Verilog, ideally block design in a CPU design project or similar high performance project
    • Understanding of CPU instruction set architecture and assembly language
    • Familiarity with ARM architecture and micro-architecture for current ARM CPU cores is helpful but not required
    • Software development skills and/ or experience is helpful (C/C++, Python/Perl, Shell scripting)
    • Experience modelling microprocessors using higher-level languages, like C/C++, is helpful but not required
    • Effective communication skills and the ability to collaborate with a team

    Job Location: Hyderabad
    Experience: 4+ years
    Educational Qualification –BS/MS EE, EC
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • DFT Functional Verification
    Requirements:
    • The candidate should have knowledge of SOC level verification methodologies and object oriented programming. Understanding and knowledge of Design For Test is desired. Experience: 2/3 years of verification exp(DFT DV experience is preferable)
    • Experience in complex SOC verification
    • Good knowledge of Verilog and experience in Verilog simulator and waveform debugging tools, proficiency in debugging both RTL and gate level simulations. Experience with Verilog design and simulation is a must.
    • Candidate preferably should have knowledge in DFT techniques such as JTAG/IEEE standards, MBIST and repair, LBIST, Boundary Scan etc
    • Experienced with testbench creation and functional coverage with HVL's such as System Verilog/Vera
    • Experience with C++ is a plus
    • Good working knowledge of UNIX/Linux and scripting languages (e.g., cshell, Perl)
    • Team player with strong communication skills

    Experience: 4+ years
    Educational Qualification – BE/BTech or ME/MTech
    Job Location:-Hyderabad
    No. of positions: 2
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Chip/Block Level Verification
    Requirements:
    • Experience in SV/ UVM based Block or Chip Level Verification of SSD Controllers
    • Good experience in implementing test bench using System Verilog/Verilog.
    • Exposure on SSD controller such as PCIe / NVMe / LDPC /DDRx/ Nand Flash / ONFI /Toggle /AXI etc
    • Experience developing Verification components from scratch
    • Experience in Test plan and Test Case creations.
    • Scripting using TCL /Perl/Shell a plus

    Experience: 4+ years
    Educational Qualification – BE/BTech or ME/MTech
    Job Location Bangalore
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • RTL – SSD Controller Design
    Requirements:
    • Digital Micro-architecture of complex IP and/or ASIC blocks
    • Experience creating Verilog based designs from Scratch
    • Experience developing AXI based IPs/ Blocks
    • Good Lint/CDC/Synthesis check experience
      • Experience in SSD Controller Designs
      • PCIe / NVMe / LDPC/BCH /DDRx/Nand Flash/ ONFI/Toggle /AXI etc.

    Experience: 4+ years
    Designation Offer – Sr.Design Engineer / Design Lead / Design Architect.
    Educational Qualification – BE/BTech or ME/MTech
    Job Location – Bangalore/ Chennai
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • RTL – Timing (Constraints/Synthesis/STA)
    Requirements:
    • Timing (Constraints/Synthesis/STA) Timing – ASIC Constraint development, Synthesis/ STA.
    • Strong experience in Logic synthesis, STA, Lint and CDC checks, DFT, constraining, physical implementation
    • Hands-on experience in timing analysis
    • Experience in doing SoC level timing analysis
    • Should be familiar with timing analysis for hierarchical designs
    • Familiarity with different types interfaces like PCIe, NVMe/, USB, DDR etc
    • Should be proficient with Synopsys' Prime Time for timing analysis
    • Good scripting skill in Tcl and Perl
    • Familiarity with different physical design tools
    • knowledge of Synopsys tools
    • Knowledge about data management is a definite plus
    • Good team player working with geo-dispersed cross cultural and cross functional teams
    • Good communication and interpersonal skills required.

    Experience: 4+ years
    Educational Qualification – BE/BTech or ME/MTech
    Job Location: Bangalore /Chennai/Hyderabad
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • DFT Verification Engineers
    Requirements:
    • Strong Familiarity with Verification Methodologies such as OVM, UVM, or VMM
    • Strong working experience in areas like DFT/MBIST/Scan Clear/LBIST/Boundary Scan
    • Familiarity with Verilog and General Logic Design concepts
    • Knowledge of system-level architecture including buses like AXI/AHB, bridges, AXI interconnects

    Experience: 6 to 9 yrs
    Educational Qualification –BS/MS EE, EC, or CS
    Job Location: Hyderabad
    Notice Period: 3-4weeks
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Protocol Verification Engineers
    Requirements:
    • Strong Familiarity with Verification Methodologies such as OVM, UVM, or VMM
    • Familiarity with Verilog and General Logic Design concepts
    • Knowledge of system-level architecture including buses like AXI/AHB, bridges, AXI interconnects
    • Strong working knowledge of UNIX environment and scripting languages such as Perl or Python
    • Knowledge on one of PCIe,USB, MIPI and NVM-Express protocols will be preferred
    • Excellent waveform debug skills using front end industry standard design tools like VCS, NCSIM, Verdi, ModelSim

    Experience: 6 to 9 yrs
    Educational Qualification –BS/MS EE, EC, or CS
    Job Location: Hyderabad
    Notice Period: 3-4weeks
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Processor Core level verification Engineers
    Requirements:
    • Experience in ASIC Design Verification with knowledge of Computer Architecture
    • Strong Verilog, System Verilog, PLI/DPI interface, SystemC or C/C++, Perl/shell script programming skills
    • OVM/UVM Methodology knowledge and experience is a plus
    • Experience in any compute architecture such as x86 or ARM domain based SOCs/Cores
    • Must have excellent knowledge of Core design & verification flows
    • Experience in developing complex test bench/model in Verilog, System Verilog or SystemC
    • Experience in writing test plans and test cases
    • Excellent hands-on debug skills
    • Must have good communication skills and the ability and desire to foster a team environment

    Experience: 4+ years
    Educational Qualification –B.E/B.Tech/M.E/M.Tech
    Job Location: Hyderabad or Bangalore
    Notice Period: 3-4weeks
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • STA Engineer: Static Timing Analysis/Full Chip Timing
    Job Summary:
    • 4+ years of experience in Timing Analysis both at block level and SoC level
    • Should have worked on Constraints development, Timing analysis
    • DFT mode timing experience is preferred
    • Hands on scripting skills on TCL/Perl
    • Deep knowledge on PrimeTime is preferred

    Experience: 4 -10 years
    Job Location:- Bangalore
    Educational Qualification – BE/BTech or ME/MTech
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Senior OpenCL (FPGA) Engineer
    Job Summary:
    • Looking for experienced OpenCL (FPGA) programmers who have worked on Altera or Xilinx SDKs using OpenCL or DSPBuilder programming. The candidate must have solid knowledge of the programming model to extract the best performance out of the FPGAs. He must also have demonstrable expertise in tuning algorithms for applications. A good understanding of FPGAs is also required. In this job, the candidate will be working with a team in US and India to implement exciting new technologies in the field of machine learning, SQL search, video transcoding, networking and other applications where FPGA acceleration is important. Additional knowledge in applications is a big plus. Knowledge of BSP (board support packages), Verilog HDL, hardware DMA engines etc. is another big plus.

    In this role, you will:
    • Rewrite or develop algorithms for FPGA acceleration using OpenCL (and/or DSPBuilder) and (optionally) BSPs.
    • Knowledge of compilation tools and OpenCL tools by Altera or Xilinx.
    • Debug for functionality and performance for OpenCL acceleration.
    • Work with teams local and remote to develop products.

    Required credentials and skills:
    • Min: Bachelor’s in Computer Science, Math, Electrical/Electronics or related fields
    • Five years’ experience in programming with off-load acceleration (OpenCL, CUDA, etc.)
    • OpenCL for FPGAs: direct experience in OpenCL for FPGA programming (at least, on one project)
    • C, scripting, debugging skills
    • Basic knowledge of PCIe

    Nice to have skills:
    • Verilog, BSP (board support packages)
    • Advanced knowledge of PCI-e
    • Programming or designing hardware DMA engines
    • In-depth knowledge of at least one area of application acceleration: machine learning, SQL search, video transcoding etc.
    • Knowledge of flash memory or any NVM technologies.

    Job Location: Bengaluru, India
    Experience: 5+ years
    Number of openings : 3
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • DFT Engineers
    Job Summary:
    • Experience in Scan Insertion, Compression, OCC/CCB Insertion, Wrapper Insertion, ATPG Simulations
    • Knowledge on Synopsys tools is preferred
    • Experience in low power/multi voltage design is preferred

    Job Location: Bangalore
    Experience: 3+ years
    Educational Qualification – BS/MS EE, EC, or CS
    Notice Period: 3-4weeks
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Verification Engineers
    Requirements:
    • Sound understanding of functional verification fundamentals encompassing state machine verification, complex protocol verification, functional test strategies, directed and stress test generation, verification infrastructures and verification and/or debug flows
    • In depth knowledge of System Verilog and verification methodologies like OVM, UVM
    • working experience on the UART, PCIe, AVALON Interface, AXI, FPGA environment
    • Working knowledge of modern PC architecture; Specific IO architecture knowledge and Low power verification is a plus
    • Expert in programming and/or scripting (C++, Perl and others) and be conversant with flows and tools for VLSI logic design and/or functional verification
    • Good knowledge on functional and code coverage

    Experience: 4+ years
    Educational Qualification – BS/MS EE, EC, or CS
    Job Location: Bangalore
    Notice Period: 3-4weeks
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • FPGA Prototyping / Emulation Engineers
    Requirements:
    • This role includes RTL design, verification, FPGA partitioning and implementation, and lab based bringup of the SoC on FPGAs.
    • Recent FPGA experience including implementation, synthesis (Synplify), timing closure (Vivado/ISE).
    • Ability to architect, implement and verify modules for FPGA interconnect.
    • Proficient in Verilog, Perl, and Make
    • Both simulation based verification and lab based debug skills on FPGAs.
    • Experience with a source control system, such as Perforce.
    • Must be familiar with both Linux and Windows environments
    • Hands on with lab FPGA debug methodologies, such as ChipScope, Identify or others.
    • Hands on experience with lab debug equipment, such as oscilloscopes and logic analyzers.

    Experience: 5+ years
    Educational Qualification – BS/MS EE, EC, or CS
    Job Location: Bangalore
    Notice Period: 3-4weeks
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • RTL Design Engineer
    Requirements:
    • Digital Micro-architecture of complex IP and/or ASIC blocks
    • Experience creating Verilog based designs from Scratch
    • Experience developing AXI based IPs/ Blocks
    • Good Lint/CDC/Synthesis check experience.

    Experience: 4 to 6 years
    Educational Qualification – BE/BTech or ME/MTech
    Job Location: Chennai
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Video Transcoding Design (MPEG /H.264)
    Qualifications:
    • Looking for Design engineer with experience on Video Transcoding (MPEG/ H.264 Codec Standards).
    • Must have worked on video encoding/decoding.
    • Preferred experience on MPEG2 (ISO/IEC 13818) and H.264 (ISO/IEC14496-10) Standards, with Elementary/Transport Stream
    • Expertise in RTL design (VHDL/Verilog), complete understanding of ASIC/FPGA flow.

    Experience: 4 to 10 years
    Educational Qualification: BE/BTech or ME/MTech
    Job Location: Bangalore
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • FPGA Design Engineer
    Requirements:
    • Looking for expert FPGA Design engineer with RTL Design [VHDL/Verilog] and Design Simulation experience [industry standard tools from Cadence, Synopsys] along with Board level testing of the FPGA designs. Hands-on FPGA Design experience along with exposure to System level testing of the FPGA design will be an ideal fit for this position.
    • Proven track record of designing, developing, prototyping, and testing high speed FPGA designs
    • Experience in Verilog programming & experience with Xilinx devices and development tools
    • Design and Debug @ Platform level including HW RTL and Board level testing.
    • System Integration Testing of FPGA Design with Software drivers will be real value addition
    • Understanding of SW Drivers and Exposure to Integration testing before SW release
    • GOOD TO HAVE SKILL SET
    • Transmux
    • SONET/SDH
    • OTN
    • PON
    • DS1, DS2, DS3

    Experience: 4 to 8 years
    Educational Qualification: BE/BTech or ME/MTech
    Job Location:Chennai & Bangalore
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Verification Engineers
    The individual will help design, develop and use simulation and verification environments, at block and full chip FPGA level, to prove the functional correctness of FPGA fabric and SOC designs.
    The ideal candidate is one who has a proven track record on driving successful verification execution on high performance SOCs and/or VLSI designs.
    Requirements:
    • Experience in verification.
    • Experience with development of UVM/OVM and/or Verilog, System Verilog test benches and usage of simulation tools/ debug environments such as Synopsys VCS, Cadence IES.
    • Require strong understanding of state of the art of verification techniques, including assertion and metric-driven verification
    • Familiarity with verification management tools as well as understanding of database management particularly as it pertains to regression management. is a plus
    • Strong understanding of different phases of ASIC and/or full custom chip development is required
    • Experience with FPGA programming and software is a plus

    Experience: 6 to 9 years
    Educational Qualification –BS/MS
    Job Location: Hyderabad
    Notice Period: 3 - 4weeks
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Verification expert in PCIe 3.0 protocol
    Requirements:
    • Verification expertise in PCIe Gen 3.0, the candidate should be expert in UVM as well as PCIe protocol.
    • Should have worked at least 3 to 5 Projects in PCIe
    • Expertise in SV and UVM Test bench exposure.

    Job Location: Bangalore
    Exp – 4+ Years
    Educational Qualification – BSEE/MSEE
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Linux Kernel & Drivers Developers
    Requirements:
    • Should have PCIe Protocol and driver development experience
    • Experience in developing and debugging Linux device drivers, boot loaders, board support package (BSP) development. Experience in ARM based SoC software development.
    • Strong experience in Linux kernel, Driver porting/development experience essential with Advanced C and Proficiency in Red Boot, u Boot or other similar boot loader development.
    • Excellent experience on Linux, porting experience on ARM or any other Architecture.
    • Good exposure on understanding requirements, design, coding, testing of complex and large-scale embedded system projects. Very good C skills. Should have worked on the following or any of the following Driver experience Display , Camera drivers , Touch screen, Backlight, Key driver Storage drivers- any of this (MMC/SD, NOR, NAND, eMMC/eSD, OneNAND).

    Experience: 10+ years
    Educational Qualification – BE/BTech or ME/MTech
    Job Location: Chennai
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • Low power Verification Engineers
    Requirements:
    • Strong Familiarity with Verification Methodologies such as OVM, UVM, or VMM
    • Strong working experience in areas like low power simulations with UPF/CPF, low power management methodologies
    • Excellent Gate Level Simulation debugging skills using VCS/NCSIM/Verdi/ModelSim
    • Familiarity with Verilog and General Logic Design concepts
    • Knowledge of system-level architecture including buses like AXI/AHB, bridges, AXI interconnects

    Experience: 6 to 9 yrs
    Educational Qualification –BS/MS EE, EC, or CS
    Job Location: Hyderabad
    Notice Period: 3-4weeks
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.
  • 100G Ethernet PCS Protocol Verification
    Requirements:
    • Experience in ASIC/IP functional Verification Engineer
    • Strong expertise in 100G Ethernet PCS Protocol Verification
    • Experience developing UVM, System Verilog components from Scratch
    • Good experience in developing test plan covering 100% of protocol features
    • Sound debugging skills

    Experience: 4+ Years
    Educational Qualification: BE/ME /MTech
    Job Location:Bangalore
    How to Apply
    Email your resumes to jobs@mobiveil.com with the job title in the subject line.

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Gen1/2/3 RC Controller with SRIOV

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